I want a circuit to restrict the voltage throughout some dissipation restricted gadgets. It should: restrict the voltage to a most of 1.5 V, have symmetrical limiting, be able to accepting a present of two A, and leak lower than 100 µA at 1 V.
Two Zener diodes in sequence, anode to anode, would do the trick, however Zener diodes with Vz = 0.8 V and a 2 W dissipation will not be commercially obtainable.
I searched the online to seek out what was obtainable. In EDN’s design concepts webpage, I discovered one , nonetheless the circuit can’t restrict voltages decrease than 2.5 V. In one other design concept  once more, the minimal voltage of 1.8 V is just too excessive for my utility, however the present goes as much as 6 A. One other reference  makes use of a single half that limits at 1.5 V, however its resistance is about 1 Ω and that mixed with my requirement of two A will give too excessive a voltage. One other circuit  depends upon the MOSFET traits to set the restrict voltage and in my utility that’s not an possibility as I must take a look at and choose MOSFETs to seek out acceptable restrict voltages. Lastly,  provides a voltage vary that’s good with a most present of 8 A, however the off present is 200 µA and that is twice my restrict. In conclusion: I’ve to design a circuit to swimsuit my wants.
The circuit of Determine 1 has the wanted traits. It’s a modified shunt sort voltage regulator. On this utility, the voltage to be regulated comes from an exterior supply, battery BT, within the schematic.
Determine 1 Schematic of a easy optimistic shunt voltage limiter.
Let’s say that the reference voltage, Vref_in within the schematics, is 1.5 V and that the voltage on the circuit output can also be 1.5 V. Since each inputs to U1 are the identical, the op amp output is 0 V, the MOSFET is off and no present flows by way of it. If the exterior voltage rises, the op amp output will grow to be extra destructive and activate Q1, a P-channel MOSFET, utilized in a supply follower configuration, and extra present flows in D1 and Q1. When the circuit is limiting, the impedance seen on the output is roughly the sum of the diode resistance plus Q1’s RDS(on) divided by the open loop voltage acquire of U1. The output impedance is within the tons of of milliohms vary. Resistor R1 is a gate stopper resistor to remove the danger of oscillations within the MOSFET.
When the output voltage goes decrease than the reference voltage, U1 output will rise optimistic and Q1 will enter the weak-inversion or subthreshold area . The suggestions loop then turns into open and the op amp will saturate to probably the most optimistic voltage it may possibly provide. Diode D1, blocks any reverse present that might circulation by way of Q1’s physique diode if the voltage on the output terminal goes destructive. With the voltage on the output is under the limiting voltage, the present that flows within the circuit output is the sum of D1 reverse leakage and U1 enter bias present.
Resistor R2 protects U1 in case of a destructive overvoltage and permits loop compensation to take motion through C1 by isolating the op amp inverting enter from the output. The worth of C1 relies on the op amp, the MOSFET and the structure.
Most rated present is outlined as the present that makes the full voltage drop throughout the diode and the MOSFET equal to the reference voltage. The equation is:
The place is the reference voltage (Vref_in), is the voltage drop throughout D1 on the rated present, RDS(on) is the MOSFET most drain-source resistance and Imax is the utmost present obtainable from the supply. If extra present than Imax is utilized, the output voltage rises linearly from the set restrict. If too excessive a present is utilized, both D1 or Q1 will overload or overheat, leading to everlasting failure. Relying on the MOSFET used, most present can be restricted by the op amp most output voltage.
Precise measurements are listed in Desk 1. All measurements had been taken with a Vcc of +15.5 V and a Vee of ‑15.5 V as a result of these are the goal instrument provide voltages. To get good outcomes, care ought to be taken as to the place the voltmeter is linked throughout measurements; a 4 wire Kelvin connection and a steady reference voltage supply are a should.
Desk 1 Measurements taken for the circuit in Determine 1.
An present versus voltage curve for circuit in Determine 1 is proven in Determine 2. The circuit holds the voltage to inside 1 mV of the reference whereas the present varies from 3 µA to three A. The knee could be very sharp.
Determine 2 Present versus voltage for circuit in Determine 1, excessive present, word the sq. knee.
In Determine 3, the low present portion of the curve is proven; the full present vary is sort of 170 dB. The present is under 100 nA for many of the vary between -14 V and +1.5 V. We will see that when the voltage reaches destructive 14 V, present will increase. The rise in present is as a result of the voltage is getting near the frequent voltage vary restrict for this op amp.
Determine 3 Present versus voltage for circuit in Determine 1, low present, exhibiting present enhance when nearing frequent mode vary restrict.
The circuit makes use of generally obtainable components. Diode D1 and MOSFET ought to be chosen to hold the total present and have a complete voltage drop lower than the reference voltage on the most present. Relying on the present worth, the MOSFET may have heatsinking. I used a Schottky diode for D1, however a silicon p-n diode would do additionally. Because the enter bias present of U1 flows from the output, I used a JFET enter op amp; any low bias present op amp will work.
For symmetrical functions, the circuit of Determine 4 works nicely. It’s made up of the optimistic limiter already seen and a complementary destructive limiter linked in parallel. A single optimistic reference voltage is used to manage each voltage limits. The destructive reference voltage is generated by a unity acquire inverter, U1.
Determine 4 Schematic for a symmetrical shunt voltage limiter.
Static measurements are in Desk 2 and Determine 5 is the corresponding graph. Determine 5 reveals symmetrical voltage limiting.
Desk 2 Measurements taken for the circuit in Determine 4.
Determine 5 Curve for circuit in Determine 4, limiting voltage could be very symmetrical about 0 V.
Because the op amp is in saturation when the circuit output voltage is under the restrict, the response is sluggish. In Determine 6, a sq. wave was supplied by a generator set to provide an open circuit peak to peak voltage of 4 V. The generator has 50 ohms output impedance. The oscilloscope CH1 is the circuit output voltage and CH2 is the op amp output. It takes about 20 µs for the op amp to slew 20 volts from roughly +15 V to -4 V.
Determine 6 Waveforms for circuit in Determine 4, reveals slewing is the main restrict to response. See textual content for particulars.
An improved circuit which doesn’t saturate the op amp is in Determine 7. The principle op amps U2A and U2B at the moment are unity acquire inverting amplifiers. Diodes D3 and D4 restrict the op amps output voltage to 0.7 V in saturation . Op amp U2A output now has to slew solely from +0.7 V to -4 V. Because the enter resistor R3 will load the output, it’s chosen to be twice the minimal acceptable resistance specified of 200 kΩ, I had 499 ok 1 % resistors available, so I used these. Waveforms are taken utilizing solely the optimistic limiter half from Determine 7, with 200 ok resistors for R3 and R7.
Determine 7 Schematic symmetrical shunt voltage limiter with the ultimate op-amps operated in inverting mode.
In Determine 8, oscilloscope CH1 is the circuit output voltage and CH2 is U2A output. The response is 5 µs, about 4 instances quicker than with the preliminary circuit.
Determine 8 Response time for circuit in Determine 7, bounded voltage results in shorter slewing time. See textual content for particulars.
Desk 3 and Determine 9 define static measurements similar to the primary circuit, besides that the present under VREF is within the microamperes vary. To have asymmetrical limiting, take away the inverter stage and use two reference voltage sources.
Desk 3 Measurements taken for circuit in Determine 7.
Determine 9 Curve for optimistic half solely of circuit in Determine 7, elevated velocity doesn’t have an effect on DC efficiency.
If that you must restrict the voltage to a price decrease than 700 mV, the voltage misplaced within the diode will make it nearly inconceivable to satisfy that requirement with both circuit. However if you happen to join the P-channel MOSFET drain to a destructive voltage supply, then any voltage restrict is feasible even 0 V. The identical strategy can be utilized for the N‑channel MOSFET. The circuit in Determine 10 does simply that with efficiency corresponding to the circuits above. The offset voltage supply, battery B1 in schematic, ought to be able to supplying the required present.
Determine 10 Schematic of a voltage limiter able to working under 1 V.
Desk 4 provides the outcomes with a 150-mV reference and an offset energy provide of 1.8 V. Present versus voltage curves at excessive present, as much as 1 A, are graphed in Determine 11. Right here once more the circuit reveals sharp knee, low leakage and fixed limiting voltage. The identical approach can be utilized with the schematic in Determine 7. For limiting voltage values under roughly 1 V, error funds calculations ought to govern your choice for the op amps offset voltage and bias present most values.
Desk 4 Measurements taken for circuit in Determine 10.
Determine 11 Curve for circuit in Determine 10.
This circuit could possibly be used as a instructing support, set the restrict voltage to zero and insert the circuit in a take a look at circuit for college kids. Think about the enjoyable and puzzlement of getting a brief circuit for one ohmmeter polarity and an open circuit for the alternative polarity!
For greatest leads to excessive present functions, the voltage limiter ought to be put in between the voltage supply and the machine to be protected.
I examined numerous diodes: Zener, silicon PN, Schottky barrier and LEDs, and none of those have such a pointy knee, low leakage and might carry as a lot present or are as versatile in use because the above circuits.
With easy modifications, the clamping voltage could possibly be prolonged to greater values, however that’s one other design concept.
 Peter Demchenko, Shunt circuit clips giant transients or regulates voltage, https://www.edn.com/shunt-circuit-clips-large-transients-or-regulates-voltage/.
 Chris Toliver, Excessive-power shunt regulator makes use of BJT & reference IC, https://www.edn.com/high-power-shunt-regulator-uses-bjt-reference-ic.
 Adolfo Mondragon, Energy Zener utilizing the LM317. https://www.edn.com/power-zener-using-the-lm317.
 Stuart R. Michaels, MOSFET shunt regulator substitutes for sequence regulator, https://www.edn.com/mosfet-shunt-regulator-substitutes-for-series-regulator/.
 Robert N. Buono. Excessive-Present, Low-Voltage Shunt Regulator, https://www.electronicdesign.com/applied sciences/analog/article/21756712/highcurrent-lowvoltage-shunt-regulator.
 Sansen, Willy. M. Analog Design Necessities. ISBN-13: 9781489978912, web page 24.
 Pease, Robert. «Bounding, clamping strategies enhance circuit efficiency». EDN, November 10, 1983. Pages 277 to 289.
Daniel Dufresne is a retired engineer and has labored in telecommunications, mass transit, client merchandise, excessive energy electronics and customized instrumentation design. He additionally was a professor at Cegep de Saint-Laurent and taught programs at Ecole Polytechnique de Montreal. He lives in Montreal, Canada and nonetheless works on digital tasks and take a look at gear modifications and repairs.
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